Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
- Developed at electronics
- Sources inherited from project openSUSE:Factory
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Source Files
| Filename | Size | Changed |
|---|---|---|
| iverilog.changes | 0000003761 3.67 KB | |
| iverilog.spec | 0000002241 2.19 KB | |
| verilog-10.1.tar.gz | 0001685176 1.61 MB |
Revision 6 (latest revision is 9)
Dominique Leuenberger (dimstar_suse)
accepted
request 377019
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Dmitry Roshchin (Dmitry_R)
(revision 6)
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