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Icarus Verilog

Edit Package iverilog

Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.

  • Devel package for openSUSE:Factory
  • 1 derived packages
  • Links to openSUSE:Factory / iverilog
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  • osc -A https://api.opensuse.org checkout electronics/iverilog && cd $_
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Source Files (show unmerged sources)
Filename Size Changed
iverilog.changes 0000004900 4.79 KB
iverilog.spec 0000002189 2.14 KB
verilog-12.0.tar.gz 0003334697 3.18 MB
Latest Revision
buildservice-autocommit accepted request 1146378 from Stanislav Brabec's avatar Stanislav Brabec (sbrabec) (revision 9) 
baserev update by copy to link target
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