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openSUSE:Step:15
xen.9798
5bd076e9-x86-boot-init-debug-regs-correctly.patch
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File 5bd076e9-x86-boot-init-debug-regs-correctly.patch of Package xen.9798
# Commit 721da6d41a70fe08b3fcd9c31a62f6709a54c6ba # Date 2018-10-24 14:43:05 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/boot: Initialise the debug registers correctly In particular, initialising %dr6 with the value 0 is buggy, because on hardware supporting Transactional Memory, it will cause the sticky RTM bit to be asserted, even though a debug exception from a transaction hasn't actually been observed. Move X86_DR6_DEFAULT into x86-defns.h along with the other architectural register constants, and introduce a new X86_DR7_DEFAULT. Use the existing write_debugreg() helper, rather than opencoded inline assembly. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Roger Pau Monné <roger.pau@citrix.com> --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,7 @@ #include <xen/delay.h> #include <xen/smp.h> #include <asm/current.h> +#include <asm/debugreg.h> #include <asm/processor.h> #include <asm/xstate.h> #include <asm/msr.h> @@ -817,10 +818,13 @@ void cpu_init(void) /* Ensure FPU gets initialised for each domain. */ stts(); - /* Clear all 6 debug registers: */ -#define CD(register) asm volatile ( "mov %0,%%db" #register : : "r"(0UL) ); - CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7); -#undef CD + /* Reset debug registers: */ + write_debugreg(0, 0); + write_debugreg(1, 0); + write_debugreg(2, 0); + write_debugreg(3, 0); + write_debugreg(6, X86_DR6_DEFAULT); + write_debugreg(7, X86_DR7_DEFAULT); /* Enable NMIs. Our loader (e.g. Tboot) may have left them disabled. */ enable_nmis(); --- a/xen/include/asm-x86/debugreg.h +++ b/xen/include/asm-x86/debugreg.h @@ -24,8 +24,6 @@ #define DR_STATUS_RESERVED_ZERO (~0xffffeffful) /* Reserved, read as zero */ #define DR_STATUS_RESERVED_ONE 0xffff0ff0ul /* Reserved, read as one */ -#define X86_DR6_DEFAULT 0xffff0ff0ul /* Default %dr6 value. */ - /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 bits - each field corresponds to one of the four debug registers, --- a/xen/include/asm-x86/x86-defns.h +++ b/xen/include/asm-x86/x86-defns.h @@ -73,4 +73,14 @@ #define X86_CR4_SMAP 0x00200000 /* enable SMAP */ #define X86_CR4_PKE 0x00400000 /* enable PKE */ +/* + * Debug status flags in DR6. + */ +#define X86_DR6_DEFAULT 0xffff0ff0 /* Default %dr6 value. */ + +/* + * Debug control flags in DR7. + */ +#define X86_DR7_DEFAULT 0x00000400 /* Default %dr7 value. */ + #endif /* __XEN_X86_DEFNS_H__ */
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