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pciutils.22837
pciutils-add-decode-support-for-RCECs.patch
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File pciutils-add-decode-support-for-RCECs.patch of Package pciutils.22837
Index: pciutils-3.5.6/lib/header.h =================================================================== --- pciutils-3.5.6.orig/lib/header.h 2017-04-29 20:05:07.000000000 +0200 +++ pciutils-3.5.6/lib/header.h 2020-10-29 09:31:24.947599754 +0100 @@ -216,7 +216,7 @@ #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ #define PCI_EXT_CAP_ID_RCLINK 0x05 /* Root Complex Link Declaration */ #define PCI_EXT_CAP_ID_RCILINK 0x06 /* Root Complex Internal Link Declaration */ -#define PCI_EXT_CAP_ID_RCECOLL 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function Virtual Channel */ #define PCI_EXT_CAP_ID_VC2 0x09 /* Virtual Channel (2nd ID) */ #define PCI_EXT_CAP_ID_RBCB 0x0a /* Root Bridge Control Block */ @@ -1007,6 +1007,12 @@ #define PCI_RCLINK_LINK_ADDR 8 /* Link Entry: Address (64-bit) */ #define PCI_RCLINK_LINK_SIZE 16 /* Link Entry: sizeof */ +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_EP_CAP_VER(reg) (((reg) >> 16) & 0xf) +#define PCI_RCEC_BUSN_REG_VER 0x02 /* as per PCIe sec 7.9.10.1 */ +#define PCI_RCEC_RCIEP_BMAP 0x0004 /* as per PCIe sec 7.9.10.2 */ +#define PCI_RCEC_BUSN_REG 0x0008 /* as per PCIe sec 7.9.10.3 */ + /* PCIe Vendor-Specific Capability */ #define PCI_EVNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_EVNDR_REGISTERS 8 /* Vendor-Specific Registers */ Index: pciutils-3.5.6/ls-ecaps.c =================================================================== --- pciutils-3.5.6.orig/ls-ecaps.c 2017-04-29 20:05:07.000000000 +0200 +++ pciutils-3.5.6/ls-ecaps.c 2020-10-29 09:31:24.947599754 +0100 @@ -650,6 +650,61 @@ cap_l1pm(struct device *d, int where) } static void +cap_rcec(struct device *d, int where) +{ + printf("Root Complex Event Collector Endpoint Association\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where, 12)) + return; + + u32 hdr = get_conf_long(d, where); + byte cap_ver = PCI_RCEC_EP_CAP_VER(hdr); + u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); + printf("\t\tRCiEPBitmap: "); + if (bmap) + { + int prevmatched=0; + int adjcount=0; + int prevdev=0; + printf("RCiEP at Device(s):"); + for (int dev=0; dev < 32; dev++) + { + if (BITS(bmap, dev, 1)) + { + if (!adjcount) + printf("%s %u", (prevmatched) ? "," : "", dev); + adjcount++; + prevdev=dev; + prevmatched=1; + } + else + { + if (adjcount > 1) + printf("-%u", prevdev); + adjcount=0; + } + } + } + else + printf("%s", (verbose > 2) ? "00000000 [none]" : "[none]"); + printf("\n"); + + if (cap_ver < PCI_RCEC_BUSN_REG_VER) + return; + + u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); + u8 lastbusn = BITS(busn, 16, 8); + u8 nextbusn = BITS(busn, 8, 8); + + if ((lastbusn == 0x00) && (nextbusn == 0xff)) + printf("\t\tAssociatedBusNumbers: %s\n", (verbose > 2) ? "ff-00 [none]" : "[none]"); + else + printf("\t\tAssociatedBusNumbers: %02x-%02x\n", nextbusn, lastbusn ); +} + +static void cap_ptm(struct device *d, int where) { u32 buff; @@ -759,8 +814,8 @@ show_ext_caps(struct device *d, int type case PCI_EXT_CAP_ID_RCILINK: printf("Root Complex Internal Link <?>\n"); break; - case PCI_EXT_CAP_ID_RCECOLL: - printf("Root Complex Event Collector <?>\n"); + case PCI_EXT_CAP_ID_RCEC: + cap_rcec(d, where); break; case PCI_EXT_CAP_ID_MFVC: printf("Multi-Function Virtual Channel <?>\n"); Index: pciutils-3.5.6/setpci.c =================================================================== --- pciutils-3.5.6.orig/setpci.c 2016-10-03 21:49:09.000000000 +0200 +++ pciutils-3.5.6/setpci.c 2020-10-29 09:34:12.540466140 +0100 @@ -293,7 +293,7 @@ static const struct reg_name pci_reg_nam { 0x20004, 0, 0, "ECAP_PB" }, { 0x20005, 0, 0, "ECAP_RCLINK" }, { 0x20006, 0, 0, "ECAP_RCILINK" }, - { 0x20007, 0, 0, "ECAP_RCECOLL" }, + { 0x20007, 0, 0, "ECAP_RCEC" }, { 0x20008, 0, 0, "ECAP_MFVC" }, { 0x2000a, 0, 0, "ECAP_RBCB" }, { 0x2000b, 0, 0, "ECAP_VNDR" }, Index: pciutils-3.5.6/tests/cap-rcec =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ pciutils-3.5.6/tests/cap-rcec 2020-10-29 09:31:24.947599754 +0100 @@ -0,0 +1,299 @@ +6a:00.4 Generic system peripheral [0807]: Intel Corporation Device 0b23 + Subsystem: Intel Corporation Device 0000 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 255 + NUMA node: 0 + Capabilities: [40] Express (v2) Root Complex Event Collector, MSI 00 + DevCap: MaxPayload 512 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend- + RootCap: CRSVisible- + RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR- + 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix- + EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit- + FRS- + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, + Capabilities: [80] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [90] MSI: Enable- Count=1/1 Maskable+ 64bit- + Address: 00000000 Data: 0000 + Masking: 00000000 Pending: 00000000 + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- + UESvrt: DLP+ SDES- TLP+ FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ + AERCap: First Error Pointer: 00, ECRCGenCap- ECRCGenEn- ECRCChkCap- ECRCChkEn- + MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap- + HeaderLog: 00000000 00000000 00000000 00000000 + RootCmd: CERptEn- NFERptEn- FERptEn- + RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd- + FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0 + ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000 + Capabilities: [160 v2] Root Complex Event Collector Endpoint Association + RCiEPBitmap: RCiEP at Device(s): 1, 6, 8-10, 12, 15 + AssociatedBusNumbers: 02-08 +00: 86 80 23 0b 00 01 10 00 00 00 07 08 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00 +30: 00 00 00 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